Update spec and register offset for interrupts
Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
This commit is contained in:
@@ -169,6 +169,10 @@ impl State {
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Ok(slice)
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Ok(slice)
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}
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}
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// stack size of 288 - yowza
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// Maybe we don't need 32 registers... this works out to 288
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const INTERRUPT_REG_SPACE: u64 = (R31 - R00 + 4) as u64 * 8;
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/// Invoke an interrupt.
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/// Invoke an interrupt.
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pub fn interrupt(&mut self, return_ip: u64, index: usize, aux: u64) -> Result<u64> {
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pub fn interrupt(&mut self, return_ip: u64, index: usize, aux: u64) -> Result<u64> {
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assert!(index < IVT_LENGTH, "invalid interrupt index");
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assert!(index < IVT_LENGTH, "invalid interrupt index");
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@@ -192,8 +196,9 @@ impl State {
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self.push(Source::Reg(reg))?;
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self.push(Source::Reg(reg))?;
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}
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}
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let sp = self.sp();
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let sp = self.sp();
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self.set_reg_unchecked(FP, sp - 48);
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self.set_reg_unchecked(FP, sp - Self::INTERRUPT_REG_SPACE);
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self.set_reg_unchecked(R00, index as u64);
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self.set_reg_unchecked(R00, index as u64);
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self.set_reg_unchecked(R01, aux);
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self.set_reg_unchecked(R01, aux);
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@@ -203,7 +208,7 @@ impl State {
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/// Exit/return from the current interrupt.
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/// Exit/return from the current interrupt.
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pub fn exit_interrupt(&mut self) -> Result<u64> {
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pub fn exit_interrupt(&mut self) -> Result<u64> {
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let fp = self.fp();
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let fp = self.fp();
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let sp = fp + 48;
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let sp = fp + Self::INTERRUPT_REG_SPACE;
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self.set_reg_unchecked(SP, sp);
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self.set_reg_unchecked(SP, sp);
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10
vm.md
10
vm.md
@@ -228,16 +228,15 @@ wrapping around to 0.
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* Push the IP of the next instruction to be called
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* Push the IP of the next instruction to be called
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* Push the FLAGS register
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* Push the FLAGS register
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* Push the STATUS register
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* Push the STATUS register
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* Push the R0 register
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* Push the R0-R31 registers
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* Push the R1 register
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* Update the IP (i.e., jump) to the address of the given interrupt vector in the IVT
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* Update the IP (i.e., jump) to the address of the given interrupt vector in the IVT
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* Update the R0 register to the value in the first parameter
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* Update the R0 register to the value in the first parameter
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* Update the R1 register to the value in the second parameter
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* Update the R1 register to the value in the second parameter
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* Update the frame pointer to the current stack pointer - 48
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* Update the frame pointer to the current stack pointer - 288
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* IRet
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* IRet
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* Opcode: 0x3005
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* Opcode: 0x3005
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* When this instruction is executed, these actions occur:
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* When this instruction is executed, these actions occur:
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* Update the stack pointer to the current frame pointer + 48
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* Update the stack pointer to the current frame pointer + 288
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* Pop the old R1 value
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* Pop the old R1 value
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* Pop the old R0 value
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* Pop the old R0 value
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* Pop the old STATUS value
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* Pop the old STATUS value
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@@ -410,8 +409,9 @@ A VM must provide support for the following meta-values:
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# General TODO
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# General TODO
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* Memory permissions
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* MMIO regions
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* MMIO regions
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* Paging?
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* Paging
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* Determine how address sizes are determined
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* Determine how address sizes are determined
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* source size <= dest size - zero extend source and copy
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* source size <= dest size - zero extend source and copy
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* mov %r0, (label)u32
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* mov %r0, (label)u32
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