Commit Graph

88 Commits

Author SHA1 Message Date
2c4b56e362 Use lrpar for parsing, big 'ol syntax overhaul
Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-02-17 16:15:06 -05:00
cf9ba376aa Add value directives and strings
.string, .zstring, .u64, .u32, .u16, .u8 are used before an ImmValue to
determine how the memory should be laid out for that value.

Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-02-11 17:49:17 -05:00
95d4eb0a60 Move test.asm -> examples directory
Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-02-11 13:57:33 -05:00
6feeeea028 Add binary number parsing
Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-02-10 19:10:17 -05:00
0ea3406b71 Add storeimm32 and storeimm64 syntax
These explicitly allow usage of storeimm32 and storeimm64 in the
assembler syntax. It will also warn you if you try to store a value
that's too large using the storeimm32 instruction

Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-02-10 18:59:23 -05:00
15423502f3 Remove data section from test.asm example file
Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-02-10 18:03:50 -05:00
7504b81b2d Require assembler sections to specify where in virtual memory they begin
Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-02-10 18:02:44 -05:00
a4a37b5a27 Add Disassemble, fix bug in position calculation
* Disassemble structure can be used for dumping an object section
* Assembler position calculation was messing up, causing jump addresses
  to be wrong. This is fixed.

Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-02-10 16:31:08 -05:00
6c352396fa Add instruction visitor, which traverses memory and choosing instructions
Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-02-10 13:22:54 -05:00
c982be553f Add execution to VM via file, starting to iron out bugs
Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-02-09 15:43:07 -05:00
00027c4542 Add memory and register checking when required in the VM
Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-02-09 14:10:02 -05:00
f1ed41f98b Rustfmt
Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-02-09 13:13:26 -05:00
1c16be650a Start using 'symbol' in favor of 'name' or 'label'
Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-02-09 13:12:56 -05:00
e198da5825 Finish up parser and assembler with more-or-less complete syntax
Major changes inlude:

* Bit the bullet and now instructions have their length hard-coded
* Move from_utf8 object parsing to be done by their objects (instead of
  a Parser god object)
* A list of AST sections are assembled into an Object using the new
  vm::obj::assemble module.
* Changed the object layout some in the spec, and adjusted code to match
  this.

Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-02-09 13:04:56 -05:00
329e61e087 Fix typos in some of the opcode binary layouts
Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-02-03 18:00:24 -05:00
214f0b8aed Add object layout, object parsing, instruction layout
* Object layout and parsing are done in the vm::obj module
* Add MemCursor, a wrapper around the std::io::Cursor type for walking
  through VM memory
* Add vm::tick module for containing the Vm::tick() method
  implementation, since it's pretty big
* Instructions are now variable-sized, and are read lazily,
  one-at-a-time directly from memory.
* Add VM runtime error structure
* Probably some other stuff I forgot

Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-02-03 17:56:32 -05:00
47ee61ca0d Finish up the opcode ascii table layouts
Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-01-28 19:27:25 -05:00
e8b874a3c9 Implement ObjParser::parse_sections
Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-01-28 19:17:35 -05:00
2148fed5a5 Add opcodes and layout for most instructions
Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-01-28 19:16:52 -05:00
54f61101c6 Rename vm::bin -> vm::obj
Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-01-28 18:35:41 -05:00
785c0c6092 Update phrasing of 'Bin' and 'format' to 'object'
Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-01-28 18:35:41 -05:00
25f89bbc73 Initial binary object layout spec and matching impl (sans code)
Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-01-28 18:35:41 -05:00
f98a53654e Update/add instructions in parser
* StoreImm just uses a u64 instead of u32 - we'll figure out the layout
  later
* Jmp implementation added (can't believe I forgot this)
* Add Inst AST item, whose immediates don't have to be a u64 right away

Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-01-28 18:35:41 -05:00
7e6c621c2b Update test.asm to conform to newest syntax
Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-01-28 18:35:41 -05:00
c4c196a136 Add lexer dump to main and fix a couple of bugs
Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-01-28 18:35:41 -05:00
a5388c8b86 Add more great ideas to the VM spec
Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-01-28 18:35:41 -05:00
b16974c7c4 Update registers to be constants, add instructions to parser
Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-01-28 18:35:41 -05:00
abf32665e2 Add allow(dead_code) to span
Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-01-28 18:35:41 -05:00
ae32403d1f Remove syn::vm::pass
Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-01-28 18:35:41 -05:00
a5bd09d7d6 Add Not and Inv instructions to spec
Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-01-28 18:27:19 -05:00
f95c24ee95 Add/rename/implement instructions based on new spec
* Add Mod instruction
* Rename Neg -> INeg
* Rename Copy -> MemCopy
* Add RegCopy

Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-01-26 11:18:53 -05:00
ce0ab273f0 Add "miscellaneous" instructions section, move Halt to there, add Nop
Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-01-26 11:17:21 -05:00
c8690e79bc Add more notes, some other TODOs, STATUS register
Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-01-26 11:15:09 -05:00
6c96adddff Add a few notes about numbers and arithmetic, rename Neg -> INeg
Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-01-26 10:59:25 -05:00
df950c6f63 Fix arithmetic instruction specs
Originally, arithmetic instructions were in the form of

    REG2 = REG1 (OP) REG2

but then I started storing the result in REG1 (both in implementation,
and later defs of the arth instructions). So I'm updating it to match
what was actually in my head.

Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-01-26 10:52:26 -05:00
Max Marrone
976b0689ba Add a modulo instruction. 2020-01-25 21:06:43 -05:00
Max Marrone
b7aa2d7ce7 Rename Copy to MemCopy and also add RegCopy. 2020-01-25 21:02:32 -05:00
ddfcec0427 Initial commit
Signed-off-by: Alek Ratzloff <alekratz@gmail.com>
2020-01-25 19:17:39 -05:00