201 lines
4.2 KiB
Markdown
201 lines
4.2 KiB
Markdown
# VM
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This is an outline of the VM that drives this language.
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# Primitives
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* Numbers may be big endian (BE) or little endian (LE) at the byte level. This guide will use LE.
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* Addresses point to single bytes.
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* Signed numbers use two's complement.
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| Type | Size (bits) |
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| - | - |
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| Address | 64 |
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| Word | 64 |
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| Halfword | 32 |
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| Byte | 8 |
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# Registers
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CPU registers are addressed by a value between 0-63 (6 bits). All registers are 64 bits wide.
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* IP - Instruction pointer
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* SP - Stack pointer
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* FP - Frame pointer
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* FLAGS - CPU flags
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* (9 unused registers)
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* STATUS - Generic status code
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* R0-R49
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## CPU Flags
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CPU flags are addressed by bit index, going from right to left.
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* `00` - Halt flag
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* `01` - Compare flag
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### Flag ideas
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* "Trace" flag - halts the CPU when certain conditions are met that may be causing undesired
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behavior - for debugging
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* Overwriting a register without its value being used
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* Mixing arithmetic with bit twiddling on the same target
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# Instructions
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## Arithmetic
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Arithmetic instructions store their result in the first register specified. Overflow is handled by
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wrapping around to 0.
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* Add
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* **Params**: REG1, REG2
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* `REG1 = REG1 + REG2`
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* Unsigned addition
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* Mul
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* **Params**: REG1, REG2
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* `REG1 = REG1 * REG2`
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* Unsigned multiplication
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* Div
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* **Params**: REG1, REG2
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* `REG1 = REG1 / REG2`
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* Unsigned division
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* Mod
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* **Params**: REG1, REG2
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* `REG1 = REG1 % REG2` (exact semantics TBD)
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* INeg
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* **Params**: REG1
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* `REG1 = REG1 * -1`
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* Signed negative
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* And
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* **Params**: REG1, REG2
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* `REG1 = REG1 & REG2`
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* Or
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* **Params**: REG1, REG2
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* `REG1 = REG1 | REG2`
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* Inv
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* **Params**: REG1
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* `REG1 = ~REG1`
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* Not
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* **Params**: REG1
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* ```
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if REG1 == 0 {
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REG1 = 0;
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} else {
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REG1 = 1;
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}
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```
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* Boolean NOT; equivalent of C's `!` unary operator
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* Xor
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* **Params**: REG1, REG2
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* `REG1 = REG1 ^ REG2`
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* Shl
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* **Params**: REG1, REG2
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* `REG1 = REG1 << REG2`
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* Shr
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* **Params**: REG1, REG2
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* `REG1 = REG1 >> REG2`
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* Does not sign extend
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### TODO
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* Add signed instructions (iadd, imul, etc)
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* Sign-extending SHR
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* Overflow flag?
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## Control flow
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* CmpEq
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* **Params**: REG1, REG2
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* ```
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if REG1 == REG2 {
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FLAGS[1] = 1;
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} else {
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FLAGS[1] = 0;
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}
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```
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* Sets the COMPARE flag to 1 if REG1 == REG2
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* CmpLt
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* **Params**: REG1, REG2
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* ```
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if REG1 < REG2 {
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FLAGS[1] = 1;
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} else {
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FLAGS[1] = 0;
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}
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```
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* Sets the COMPARE flag to 1 if REG1 < REG2
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* Jz
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* **Params**: REG1
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* ```
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if FLAGS[1] == 0 {
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IP = REG1;
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}
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```
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* Jumps to the address in REG1 if COMPARE flag is 0.
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* Jnz
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* **Params**: REG1
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* ```
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if FLAGS[1] != 0 {
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IP = REG1;
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}
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```
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* Jumps to the address in REG1 if COMPARE flag is 1.
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## Data movement
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* Load
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* **Params**: REG1, REG2
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* ```
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REG1 = MEM[REG2];
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```
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* Sets REG1 to the value at the memory address in REG2.
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* Store
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* **Params**: REG1, REG2
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* ```
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MEM[REG2] = REG1;
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```
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* Sets the value at the memory address in REG2 to the value in REG1.
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* StoreImm32
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* **Params**: REG1, IMM_32
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* `REG1 = IMM_32`
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* Sets REG1 to the specified 32-bit number.
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* MemCopy
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* **Params**: REG1, REG2
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* `MEM[REG1] = MEM[REG2]`
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* Copies the value at the memory address in REG2 to the memory address in REG1.
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* RegCopy
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* **Params**: REG1, REG2
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* `REG1 = REG2`
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* Copies the value in REG2 into REG1.
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## Miscellaneous
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* Halt
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* **Params**: (none)
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* `FLAGS[0] = 1`
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* Halts the machine
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* Nop
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* **Params**: (none)
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* Does nothing
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## Other instructions TODO
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* Call
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* Takes address and number of bytes on the stack that are for args(?)
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* Updates SP, FP, IP, storing previous values starting at the new FP
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* Ret
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* Uses FP to determine previous SP, FP, and IP and restores them
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* Push
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* Pop
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* More immediate stores?
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# General TODO
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* Interrupts
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* MMIO regions
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* Execution pipeline
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* Helps to define when certain side effects happen (e.g. when the IP increments)
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* Paging?
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